hardware:motherboards:up2000
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| hardware:motherboards:up2000 [2026/07/13 04:50] – created mattst88 | hardware:motherboards:up2000 [2026/07/17 13:09] (current) – mattst88 | ||
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| The UP2000 is the first motherboard to be built by API NetWorks and was released in 1999. | The UP2000 is the first motherboard to be built by API NetWorks and was released in 1999. | ||
| - | * 1-2 667 MHz EV67 CPUs with 2/4MB external L2 cache or 750 MHz EV67 CPUs with 4/8MB external L2 cache [(> | + | * 1-2 667 MHz EV67 CPUs with 2/4 MiB external L2 cache or 750 MHz EV67 CPUs with 4/8 MiB external L2 cache [(> |
| * Tsunami chipset (1x Cchip, 4x Dchips, 2x Pchips) | * Tsunami chipset (1x Cchip, 4x Dchips, 2x Pchips) | ||
| - | * 8x 168 pin DIMMs, supports 64 MB to 2GB of ECC Registered RAM (2.67 GB/s) | + | * 8x 168 pin DIMMs, supports 64 MiB to 2 GiB of ECC Registered RAM (2.67 GiB/s) |
| * 256-bit memory bus running at 83 MHz | * 256-bit memory bus running at 83 MHz | ||
| * 64-bit 33 MHz PCI Bus with 2x 64-bit 33 MHz PCI slots and 1 32-bit 33 MHz slot | * 64-bit 33 MHz PCI Bus with 2x 64-bit 33 MHz PCI slots and 1 32-bit 33 MHz slot | ||
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| {{gallery>: | {{gallery>: | ||
| + | {{anchor: | ||
| ==== UP2000+ ==== | ==== UP2000+ ==== | ||
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| A feature added to the UP2000+ was the ability to automatically detect the frequency of the CPUs, whereas the UP2000 required jumpered configuration. [(> | A feature added to the UP2000+ was the ability to automatically detect the frequency of the CPUs, whereas the UP2000 required jumpered configuration. [(> | ||
| - | * 1-2 833 MHz EV68AL CPUs with 4/8MB external L2 cache (in addition to CPUs supported by UP2000) [(> | + | * 1-2 833 MHz EV68AL CPUs with 4/8 MiB external L2 cache (in addition to CPUs supported by UP2000) [(> |
| * 2x 64-bit 33 MHz PCI Buses | * 2x 64-bit 33 MHz PCI Buses | ||
| * 3x 64-bit Slots on bus 0 | * 3x 64-bit Slots on bus 0 | ||
hardware/motherboards/up2000.1783918250.txt.gz · Last modified: by mattst88