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hardware:motherboards:eb64

EB64

EB64
CPU 21064 (EV4), 150 MHz
Memory 4 SIMM slots, parity FPM DRAM, up to 64 MiB
Buses ISA
Onboard I/O Am79C960 Ethernet, floppy, 2 serial, keyboard, mouse
Firmware Debug monitor, SRM
Linux Removed in 1995

The DECchip 21064 Evaluation Board (EB64) is an evaluation board released in 1993.

Specifications

  • DECchip 21064 CPU at 150 MHz 1)
  • 512 KiB external backup cache (Bcache) of 12 ns SRAMs, configurable to 256 or 128 KiB
  • 4x 36-bit DRAM SIMMs, supports 4 MiB to 64 MiB with parity, 128-bit data path
  • 2x ISA slots, driven by a VLSI Technology SC486 (VL82C486 and VL82C113A) ISA bus controller, which also provides the interrupt controller, DMA controller, timers, real-time clock, and keyboard and mouse interfaces
  • SMC FDC37C651 Super I/O controller providing 2 serial ports and a floppy disk controller
  • AMD Am79C960 PCnet-ISA Ethernet with 10BaseT and 10Base2 interfaces
  • Serial ROM (SROM) for CPU initialization
  • 2x PROM sockets: a 512 KiB or 1 MiB debug ROM containing the debug monitor, and one user-programmable
  • High-speed 21064 pin-bus expansion interface

Firmware

DEC made SRM consoles available for its evaluation boards, including the EB64, as part of its evaluation board software development kit. 2) 3)

Linux

Linux has not supported the EB64 since November 1995, when support was removed at DEC's request because the board was out of production and had never sold in volume. 4) 5)

The EB64 should not be confused with the PCI-based EB64+ or AlphaPC 64; some mailing list posts use "EB64" to refer to one of those boards.

Documentation

Document Part number Date
DECchip 21064 Evaluation Board User's Guide EC-N0351-72 September 1993

2) "Re: SRM license issues", Jay Estabrook, axp-list, 6 Jan 1998
3) "Re: Milo booting other OSes?", Jay Estabrook, axp-list, 29 Oct 1997
4) "RE: test", David Rusling, axp-list, 23 Nov 1995
5) "Re: test", David Mosberger-Tang, axp-list, 26 Nov 1995
hardware/motherboards/eb64.txt · Last modified: by 127.0.0.1