The UP2000 and UP2000+ are dual-processor motherboards produced by Alpha Processor, Inc. (API), with the Tsunami chipset and a Slot B processor interface. ¹⁾

The UP2000 was introduced in 2000. ²⁾

• 1-2 667 MHz EV67 CPUs with 2/4 MiB external L2 cache or 750 MHz EV67 CPUs with 8 MiB external L2 cache ^{3) 4)}
• Tsunami chipset (1x Cchip, 4x Dchips, 2x Pchips)
• 8x 168 pin DIMMs, supports 64 MiB to 2 GiB of ECC Registered RAM (2.67 GiB/s)
• 256-bit memory bus running at 83 MHz
• 64-bit 33 MHz PCI Bus with 2x 64-bit 33 MHz PCI slots and 1 32-bit 33 MHz slot
• 32-bit 33 MHz PCI Bus with 3x PCI slots
• AIC-7891 SCSI
• Cypress CY82C693UB PCI-to-ISA bridge with EIDE and 2x USB ports; SMC FDC37C669 Super I/O with floppy, parallel, 2x serial, keyboard, and mouse ⁵⁾
• 1x ISA slot (shared)
• Extended ATX form factor, 12 in x 13 in ⁶⁾

The UP2000 has four configuration jumper blocks: J27, J29, and J34 together select the CPU speed and must all match the Slot B modules, and J36 selects the L2 cache size. ⁷⁾ J29 also selects the recovery modes; the other J29 pins must stay at their defaults: ⁸⁾

The debug ports, J43 for the primary Slot B module and J42 for the secondary, default to 9600 baud. ⁹⁾

The UP2000+ is a minor update to the UP2000; apart from the changes below, the hardware is the same. The UP2000+ detects the CPU frequency automatically, whereas the UP2000 required jumpered configuration. ¹⁰⁾

• 1-2 833 MHz EV68AL CPUs with 4/8 MiB external L2 cache (in addition to CPUs supported by UP2000) ¹¹⁾
• 2x 64-bit 33 MHz PCI Buses
  • 3x 64-bit Slots on bus 0
  • 1x 64-bit and 2x 32-bit slots on bus 1

The UP2000+ has two jumper blocks. J31 sets the processor voltage (see CPU). ¹²⁾ J29 sets the other options; by default only pins 13-14 are jumpered: ¹³⁾

• The CPU is soldered to the Slot B module and cannot be replaced separately. The UP2000's SROM only has code for 667 MHz (2/4 MiB cache) and 750 MHz (8 MiB cache) processors. ¹⁴⁾
• 750 MHz processors run with a 75 MHz memory bus, compared to 83 MHz for 667 MHz and 833 MHz processors, which is why all 750 MHz modules sold had 8 MiB of cache. ¹⁵⁾ The 750 MHz modules use the most power of any Slot B module; the EV68 833 MHz modules use much less. ¹⁶⁾
• The 833 MHz Slot B modules with 4 MiB DDR cache can only be used in the UP2000+, not the UP2000. ¹⁷⁾ EV67 Slot B modules reached end of life in early 2001, replaced by EV68 modules with 4 MiB DDR cache. ¹⁸⁾
• On the UP2000+, jumper J31 selects the CPU voltage: no jumper for 21264/21264A processors, and a jumper for 21264B processors. ¹⁹⁾

DIMMs are installed in banks of four, and a system with fewer than four DIMMs does not start. Four 256 MiB DIMMs and eight 128 MiB DIMMs perform the same. ²⁰⁾

• The power supply should be at least 450 W, with at least 35 A on 3.3 V, 30 A on 5 V, and 15 A on 12 V, and must provide the 20-pin ATX connector, a supplementary 6-pin connector, and a 4-pin drive connector for the motherboard. Supplementary fans connected to the motherboard use a nonstandard pinout. ²¹⁾ A 500 W supply is advisable with two CPUs. ²²⁾
• Each Slot B module needs at least 45 cfm of airflow. ²³⁾ API specified the systems for a maximum ambient temperature of 35 C. ²⁴⁾ A stopped Slot B fan can turn off the power good LED and prevent the system from starting. ²⁵⁾
• The board is extended ATX, and the Slot B fans extend beyond the edge of the board. Each Slot B module weighs about 2 lb (0.9 kg) and is held by four standoffs whose positions are not part of any ATX specification. ²⁶⁾ A drill template for the standoffs is available. ²⁷⁾ The case must be stiff enough to hold the modules without flexing; thin aluminum cases are not recommended. ²⁸⁾

• The Cypress (Contaq) CY82C693 south bridge has two IDE controllers, but only one is wired to a connector, limiting the board to two IDE devices. ²⁹⁾
• SRM does not assign an interrupt to the onboard USB controller, so it generally cannot be used; a PCI USB card works instead. ³⁰⁾
• The UP2000 can report CPU temperatures from its LM75 sensors; the UP2000+ can also report fan speeds. ³¹⁾

• AlphaBIOS and the SRM console are both present in flash, but Linux cannot be booted from AlphaBIOS on the UP2000, so it is booted from SRM. ³²⁾
• The last SRM release for the UP2000 and UP2000+ is A5.8-81, dated 8 May 2001. ^{33) 34)} After API's web site went offline, its firmware was mirrored by Peter Petrakis. ³⁵⁾
• The same A5.8-81 package, up2000_srm_5.8-81.zip (UP20SRM.ROM and the UP2000FW.TXT file list), serves both the UP2000 and the UP2000+, and is kept in the alphalinux/firmware repository with earlier releases in its archive directory. SRM 5.8-65 or later is required for 833 MHz Slot B modules in a UP2000+. When lfu asks for the file list, up2000fw.txt must be typed, because the default, pc264fw.txt, fails; update srm then writes the image. ³⁶⁾
• Compaq's Alpha Systems Firmware CD identifies the UP2000 as a DS20, and flashing a UP2000 from it leaves the system without a working SRM console; API's own UP2000 SRM image must be used instead. ³⁷⁾
• SRM is updated with lfu from a floppy. If lfu hangs reading the floppy, running it after set auto_action halt and a power cycle avoids the hang. ³⁸⁾
• If the system shows only a blue screen with a cursor, the console is probably set to the serial port; set console graphics, entered from a terminal on the serial port, restores the graphics console. ³⁹⁾
• The BIOS emulator in the UP2000 and UP2000+ SRM cannot initialize newer ATI cards, such as the PCI Radeon 7500 and 9000. ^{40) 41)}

On the UP2000+, jumper block J29 pins 15-16 invoke the fail-safe boot recovery, and pins 1-2 recover the firmware. ⁴²⁾ If that does not work, the firmware can be recovered through the SROM serial debug port (a DEC MMJ connector): load the EBSDK debug monitor over the serial line, use it to load SRM, then reflash SRM from a floppy. ^{43) 44)} The debug monitor image is dp264dbm.cmp, and transfers only work at 9600 baud. ⁴⁵⁾

Current kernels support both boards with CONFIG_ALPHA_DP264 or a generic kernel, like other Tsunami systems, including both CPUs in SMP kernels; ^{46) 47)} they boot from SRM with aboot. The onboard devices use these drivers:

• SCSI (Adaptec AIC-7891): aic7xxx ⁴⁸⁾
• IDE (Cypress CY82C693): pata_cypress ⁴⁹⁾
• USB: the onboard controller generally cannot be used, because SRM assigns it no interrupt; see Onboard devices.

API, renamed API NetWorks at the end of 2000, ⁵⁰⁾ took over the barely started development of the UP2000 from Samsung. ⁵¹⁾ The UP2000+ and the 833 MHz Slot B modules were announced in late 2000, but deliveries to resellers were delayed until June 2001. ⁵²⁾

The UP2000 is not an officially supported Tru64 UNIX platform. ⁵³⁾

The API NetWorks CS20 is a 1U dual processor system similar to the UP2000+. It uses the Tsunami chipset, but has CPUs soldered to the board instead of Slot B modules, an ALi south bridge instead of the Cypress, LSI Ultra160 SCSI instead of Adaptec, and dual onboard Ethernet. ⁵⁴⁾ Cray used the CS20 as the building block of its SuperCluster systems. ⁵⁵⁾ API designed the CS20 and sold the design to Compaq, which produced it as the AlphaServer DS20L. ⁵⁶⁾

The following sources conflict with each other or with the account given above. They are listed here for further investigation.

• Cache on 750 MHz CPUs
  • UP2000 User Manual: "4MB or 8 MB cache per 750 MHz processor"
  • "Re: Can I swap the 21264A in a UP2000 processor cardridge ?", Rich Payne, axp-list, 21 Dec 2001: "SROM code for 667-(2MB/4MB) and 750-8MB"
  • "Re: Can I swap the 21264A in a UP2000 processor cardridge ?", Maurice Hilarius, axp-list, 20 Dec 2001: "That is why the 750's that were sold all had bigger (8mb) cache."
• 667 MHz Slot B modules with DDR cache
  • "Re: API Networks article on The Register", Rich Payne, axp-list, 6 Nov 2000: "There are no 667/750 DDR SlotBs."
  • "RE: UP2000", Maurice Hilarius, axp-list, 28 Feb 2001: "EV68 in 667 and 833, both with 4MB DDR is the current offering."